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Consider a combination of T and D flip flip-flop is connected to the input of the connected to the input of the D flip-flop is connected to the input of the T flip-flop and the output of the T Flip-flop is connected to the input of the D Flip-flop,
Initially, both Q0 and Q1 are set to 1 (before the 1 clock cycle). The outputs

[GATE CS 2017 Set 1]
A
B
C
D